<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<title>OpenShoe: PLL Management</title>

<link href="tabs.css" rel="stylesheet" type="text/css"/>
<link href="doxygen.css" rel="stylesheet" type="text/css" />

<link href="search/search.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="search/search.js"></script>
<script type="text/javascript">
  $(document).ready(function() { searchBox.OnSelectItem(0); });
</script>

</head>
<body>
<div id="top"><!-- do not remove this div! -->


<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  
  
  <td style="padding-left: 0.5em;">
   <div id="projectname">OpenShoe
   &#160;<span id="projectnumber">0.1</span>
   </div>
   
  </td>
  
  
  
 </tr>
 </tbody>
</table>
</div>

<!-- Generated by Doxygen 1.7.5.1 -->
<script type="text/javascript">
var searchBox = new SearchBox("searchBox", "search",false,'Search');
</script>
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
      <li><a href="pages.html"><span>Related&#160;Pages</span></a></li>
      <li><a href="modules.html"><span>Modules</span></a></li>
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="files.html"><span>Files</span></a></li>
      <li>
        <div id="MSearchBox" class="MSearchBoxInactive">
        <span class="left">
          <img id="MSearchSelect" src="search/mag_sel.png"
               onmouseover="return searchBox.OnSearchSelectShow()"
               onmouseout="return searchBox.OnSearchSelectHide()"
               alt=""/>
          <input type="text" id="MSearchField" value="Search" accesskey="S"
               onfocus="searchBox.OnSearchFieldFocus(true)" 
               onblur="searchBox.OnSearchFieldFocus(false)" 
               onkeyup="searchBox.OnSearchFieldChange(event)"/>
          </span><span class="right">
            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
          </span>
        </div>
      </li>
    </ul>
  </div>
</div>
<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
<a href="#define-members">Defines</a> &#124;
<a href="#enum-members">Enumerations</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">PLL Management</div>  </div>
<div class="ingroups"><a class="el" href="group__clk__group.html">Clock Management</a></div></div>
<div class="contents">
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structpll__config.html">pll_config</a></td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Hardware-specific representation of PLL configuration.  <a href="structpll__config.html#details">More...</a><br/></td></tr>
<tr><td colspan="2"><h2><a name="define-members"></a>
Defines</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga3778ecbe3fb3e8480ce23312a613a0aa">PLL_TIMEOUT_MS</a>&#160;&#160;&#160;div_ceil(1000 * (PLL_MAX_STARTUP_CYCLES * 2), OSC_RCSYS_MIN_HZ)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of milliseconds to wait for PLL lock.  <a href="#ga3778ecbe3fb3e8480ce23312a613a0aa"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="enum-members"></a>
Enumerations</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#gacfb06d8fc0ffbe934077438884ae697f">pll_source</a> { <a class="el" href="group__pll__group.html#ggacfb06d8fc0ffbe934077438884ae697fa060f32d7388cf128f527739090aa4217">PLL_SRC_OSC0</a> =  0, 
<a class="el" href="group__pll__group.html#ggacfb06d8fc0ffbe934077438884ae697fa28e003235f43b85c6ee49bbe81b67218">PLL_SRC_OSC1</a> =  1, 
<a class="el" href="group__pll__group.html#ggacfb06d8fc0ffbe934077438884ae697fa87507b481d2c92b721d802a5ae6cc8a5">PLL_SRC_RC8M</a> =  2, 
<a class="el" href="group__pll__group.html#ggacfb06d8fc0ffbe934077438884ae697fa5020b47784b860efae2c423d33999dcc">PLL_NR_SOURCES</a>
 }</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">PLL clock source.  <a href="group__pll__group.html#gacfb06d8fc0ffbe934077438884ae697f">More...</a><br/></td></tr>
<tr><td colspan="2"><h2><a name="func-members"></a>
Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#gaeee0be729bfa596c973cf6f725a89d45">pll_config_write</a> (const struct <a class="el" href="structpll__config.html">pll_config</a> *cfg, unsigned int pll_id)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Activate the configuration <em>cfg</em> on <em>pll_id</em>.  <a href="#gaeee0be729bfa596c973cf6f725a89d45"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#gaede6e280289cb0759af0f5a34f5a627f">pll_enable</a> (const struct <a class="el" href="structpll__config.html">pll_config</a> *cfg, unsigned int pll_id)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Activate the configuration <em>cfg</em> and enable PLL <em>pll_id</em>.  <a href="#gaede6e280289cb0759af0f5a34f5a627f"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga9b369b5f673b10a6adf14cd3c9fea5ad">pll_disable</a> (unsigned int pll_id)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the PLL identified by <em>pll_id</em>.  <a href="#ga9b369b5f673b10a6adf14cd3c9fea5ad"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="member-group"></a>
Chip-specific PLL characteristics</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga3a7cd8f570834e0f208037619b798aef">PLL_MAX_STARTUP_CYCLES</a>&#160;&#160;&#160;((1 &lt;&lt; AVR32_SCIF_PLL_PLLCOUNT_SIZE) - 1)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum PLL startup time in number of slow clock cycles.  <a href="#ga3a7cd8f570834e0f208037619b798aef"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga23ebd75638f609ce613b82e773ea48a5">NR_PLLS</a>&#160;&#160;&#160;2</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of on-chip PLLs.  <a href="#ga23ebd75638f609ce613b82e773ea48a5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga58acd4425beaa32dad5ccffa073cb0a5">PLL_MIN_HZ</a>&#160;&#160;&#160;40000000</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum frequency that the PLL can generate.  <a href="#ga58acd4425beaa32dad5ccffa073cb0a5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#gaeced77fb7ec635ab33085a71a0c15227">PLL_MAX_HZ</a>&#160;&#160;&#160;240000000</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum frequency that the PLL can generate.  <a href="#gaeced77fb7ec635ab33085a71a0c15227"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="member-group"></a>
PLL configuration</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga2b9ba9ce6a7290303f6e8d41191fd0d8">pll_config_defaults</a>(cfg, pll_id)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize PLL configuration using default parameters.  <a href="#ga2b9ba9ce6a7290303f6e8d41191fd0d8"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga16c8db5e3f1a2c759a88371120579c4d">pll_get_default_rate</a>(pll_id)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the default rate in Hz of <em>pll_id</em>.  <a href="#ga16c8db5e3f1a2c759a88371120579c4d"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="member-group"></a>
Chip-specific PLL options</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#gae74457d5b4073fdb82cb6b9f3d8b76e2">PLL_NR_OPTIONS</a>&#160;&#160;&#160;AVR32_SCIF_PLL_PLLOPT_SIZE</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of PLL option bits.  <a href="#gae74457d5b4073fdb82cb6b9f3d8b76e2"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga03717c32c87c59df4b94a4233a5c2e3e">PLL_OPT_VCO_RANGE_LOW</a>&#160;&#160;&#160;0</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">VCO frequency range is 80-180 MHz (160-240 MHz if unset).  <a href="#ga03717c32c87c59df4b94a4233a5c2e3e"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga0ab4eb3395991501ba1c8aa8a7c606be">PLL_OPT_OUTPUT_DIV</a>&#160;&#160;&#160;1</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Divide output frequency by two.  <a href="#ga0ab4eb3395991501ba1c8aa8a7c606be"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#gaa2d0c945bda195002b421eb79d2c87ca">PLL_OPT_WBM_DISABLE</a>&#160;&#160;&#160;2</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable wide-bandwidth mode.  <a href="#gaa2d0c945bda195002b421eb79d2c87ca"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pll__group.html#ga49eaeabf6add7c1be4000c77cb8b2bff">PLL_VCO_LOW_THRESHOLD</a></td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">The threshold under which to set the <a class="el" href="group__pll__group.html#ga03717c32c87c59df4b94a4233a5c2e3e" title="VCO frequency range is 80-180 MHz (160-240 MHz if unset).">PLL_OPT_VCO_RANGE_LOW</a> option.  <a href="#ga49eaeabf6add7c1be4000c77cb8b2bff"></a><br/></td></tr>
</table>
<hr/><a name="details" id="details"></a><h2>Detailed Description</h2>
<p>This group contains functions and definitions related to configuring and enabling/disabling on-chip PLLs. A PLL will take an input signal (the <em>source</em>), optionally divide the frequency by a configurable <em>divider</em>, and then multiply the frequency by a configurable <em>multiplier</em>.</p>
<p>Some devices don't support input dividers; specifying any other divisor than 1 on these devices will result in an assertion failure. Other devices may have various restrictions to the frequency range of the input and output signals.</p>
<dl class="user"><dt><b>Example: Setting up PLL0 with default parameters</b></dt><dd></dd></dl>
<p>The following example shows how to configure and enable PLL0 using the default parameters specified using the configuration symbols listed above, and with Wide Bandwidth Mode disabled (a UC3A3-specific PLL option.) </p>
<div class="fragment"><pre class="fragment">        <span class="keyword">struct </span><a class="code" href="structpll__config.html" title="Hardware-specific representation of PLL configuration.">pll_config</a> pllcfg;

        <a class="code" href="group__pll__group.html#ga2b9ba9ce6a7290303f6e8d41191fd0d8" title="Initialize PLL configuration using default parameters.">pll_config_defaults</a>(&amp;pllcfg, 0);
        pll_config_set_option(&amp;pllcfg, <a class="code" href="group__pll__group.html#gaa2d0c945bda195002b421eb79d2c87ca" title="Disable wide-bandwidth mode.">PLL_OPT_WBM_DISABLE</a>);
        <a class="code" href="group__pll__group.html#gaede6e280289cb0759af0f5a34f5a627f" title="Activate the configuration cfg and enable PLL pll_id.">pll_enable</a>(&amp;pllcfg, 0);
        pll_wait_for_lock(0); 
</pre></div><p>When the last function call returns, PLL0 is ready to be used as the main system clock source.</p>
<h2><a class="anchor" id="pll_group_config"></a>
Configuration Symbols</h2>
<p>Each PLL has a set of default parameters determined by the following configuration symbols in the application's configuration <a href="file:">file:</a></p>
<ul>
<li><b>CONFIG_PLLn_SOURCE:</b> The default clock source connected to the input of PLL <em>n</em>. Must be one of the values defined by the <a class="el" href="group__pll__group.html#gacfb06d8fc0ffbe934077438884ae697f" title="PLL clock source.">pll_source</a> enum.</li>
<li><b>CONFIG_PLLn_MUL:</b> The default multiplier (loop divider) of PLL <em>n</em>.</li>
<li><b>CONFIG_PLLn_DIV:</b> The default input divider of PLL <em>n</em>.</li>
</ul>
<p>These configuration symbols determine the result of calling <a class="el" href="group__pll__group.html#ga2b9ba9ce6a7290303f6e8d41191fd0d8" title="Initialize PLL configuration using default parameters.">pll_config_defaults()</a> and <a class="el" href="group__pll__group.html#ga16c8db5e3f1a2c759a88371120579c4d" title="Get the default rate in Hz of pll_id.">pll_get_default_rate()</a>. </p>
<hr/><h2>Define Documentation</h2>
<a class="anchor" id="ga23ebd75638f609ce613b82e773ea48a5"></a><!-- doxytag: member="uc3c/pll.h::NR_PLLS" ref="ga23ebd75638f609ce613b82e773ea48a5" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define NR_PLLS&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Number of on-chip PLLs. </p>

</div>
</div>
<a class="anchor" id="ga2b9ba9ce6a7290303f6e8d41191fd0d8"></a><!-- doxytag: member="uc3c/pll.h::pll_config_defaults" ref="ga2b9ba9ce6a7290303f6e8d41191fd0d8" args="(cfg, pll_id)" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define pll_config_defaults</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">cfg, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">pll_id&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<b>Value:</b><div class="fragment"><pre class="fragment">pll_config_init(cfg,                                                   \
                        CONFIG_PLL##pll_id##_SOURCE,                           \
                        CONFIG_PLL##pll_id##_DIV,                              \
                        CONFIG_PLL##pll_id##_MUL)
</pre></div>
<p>Initialize PLL configuration using default parameters. </p>
<p>After this function returns, <em>cfg</em> will contain a configuration which will make the PLL run at (CONFIG_PLLx_MUL / CONFIG_PLLx_DIV) times the frequency of CONFIG_PLLx_SOURCE.</p>
<dl><dt><b>Parameters:</b></dt><dd>
  <table class="params">
    <tr><td class="paramname">cfg</td><td>The PLL configuration to be initialized. </td></tr>
    <tr><td class="paramname">pll_id</td><td>Use defaults for this PLL. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a class="anchor" id="ga16c8db5e3f1a2c759a88371120579c4d"></a><!-- doxytag: member="uc3c/pll.h::pll_get_default_rate" ref="ga16c8db5e3f1a2c759a88371120579c4d" args="(pll_id)" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define pll_get_default_rate</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">pll_id</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<b>Value:</b><div class="fragment"><pre class="fragment">((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE)                            \
                        * CONFIG_PLL##pll_id##_MUL)                            \
                        / CONFIG_PLL##pll_id##_DIV)
</pre></div>
<p>Get the default rate in Hz of <em>pll_id</em>. </p>

</div>
</div>
<a class="anchor" id="gaeced77fb7ec635ab33085a71a0c15227"></a><!-- doxytag: member="uc3c/pll.h::PLL_MAX_HZ" ref="gaeced77fb7ec635ab33085a71a0c15227" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_MAX_HZ&#160;&#160;&#160;240000000</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Maximum frequency that the PLL can generate. </p>

</div>
</div>
<a class="anchor" id="ga3a7cd8f570834e0f208037619b798aef"></a><!-- doxytag: member="uc3c/pll.h::PLL_MAX_STARTUP_CYCLES" ref="ga3a7cd8f570834e0f208037619b798aef" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_MAX_STARTUP_CYCLES&#160;&#160;&#160;((1 &lt;&lt; AVR32_SCIF_PLL_PLLCOUNT_SIZE) - 1)</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Maximum PLL startup time in number of slow clock cycles. </p>

</div>
</div>
<a class="anchor" id="ga58acd4425beaa32dad5ccffa073cb0a5"></a><!-- doxytag: member="uc3c/pll.h::PLL_MIN_HZ" ref="ga58acd4425beaa32dad5ccffa073cb0a5" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_MIN_HZ&#160;&#160;&#160;40000000</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Minimum frequency that the PLL can generate. </p>
<dl class="note"><dt><b>Note:</b></dt><dd>The PLL must run at twice this frequency internally, but the output frequency may be divided by two by setting the PLLOPT[1] bit. </dd></dl>

</div>
</div>
<a class="anchor" id="gae74457d5b4073fdb82cb6b9f3d8b76e2"></a><!-- doxytag: member="uc3c/pll.h::PLL_NR_OPTIONS" ref="gae74457d5b4073fdb82cb6b9f3d8b76e2" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_NR_OPTIONS&#160;&#160;&#160;AVR32_SCIF_PLL_PLLOPT_SIZE</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Number of PLL option bits. </p>
<p>Number of PLL options. </p>

</div>
</div>
<a class="anchor" id="ga0ab4eb3395991501ba1c8aa8a7c606be"></a><!-- doxytag: member="uc3c/pll.h::PLL_OPT_OUTPUT_DIV" ref="ga0ab4eb3395991501ba1c8aa8a7c606be" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_OPT_OUTPUT_DIV&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Divide output frequency by two. </p>

</div>
</div>
<a class="anchor" id="ga03717c32c87c59df4b94a4233a5c2e3e"></a><!-- doxytag: member="uc3c/pll.h::PLL_OPT_VCO_RANGE_LOW" ref="ga03717c32c87c59df4b94a4233a5c2e3e" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_OPT_VCO_RANGE_LOW&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>VCO frequency range is 80-180 MHz (160-240 MHz if unset). </p>

</div>
</div>
<a class="anchor" id="gaa2d0c945bda195002b421eb79d2c87ca"></a><!-- doxytag: member="uc3c/pll.h::PLL_OPT_WBM_DISABLE" ref="gaa2d0c945bda195002b421eb79d2c87ca" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_OPT_WBM_DISABLE&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Disable wide-bandwidth mode. </p>

</div>
</div>
<a class="anchor" id="ga3778ecbe3fb3e8480ce23312a613a0aa"></a><!-- doxytag: member="uc3c/pll.h::PLL_TIMEOUT_MS" ref="ga3778ecbe3fb3e8480ce23312a613a0aa" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_TIMEOUT_MS&#160;&#160;&#160;div_ceil(1000 * (PLL_MAX_STARTUP_CYCLES * 2), OSC_RCSYS_MIN_HZ)</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Number of milliseconds to wait for PLL lock. </p>

</div>
</div>
<a class="anchor" id="ga49eaeabf6add7c1be4000c77cb8b2bff"></a><!-- doxytag: member="uc3c/pll.h::PLL_VCO_LOW_THRESHOLD" ref="ga49eaeabf6add7c1be4000c77cb8b2bff" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define PLL_VCO_LOW_THRESHOLD</td>
        </tr>
      </table>
</div>
<div class="memdoc">
<b>Value:</b><div class="fragment"><pre class="fragment">((<a class="code" href="uc3c_2pll_8h.html#aabe42b8f766d0b3a02385d4c04494810">AVR32_SCIF_PLL_VCO_RANGE0_MIN_FREQ</a>         \
                + <a class="code" href="uc3c_2pll_8h.html#ac443c8c74126291df314757d411a14f5">AVR32_SCIF_PLL_VCO_RANGE1_MAX_FREQ</a>) / 2)
</pre></div>
<p>The threshold under which to set the <a class="el" href="group__pll__group.html#ga03717c32c87c59df4b94a4233a5c2e3e" title="VCO frequency range is 80-180 MHz (160-240 MHz if unset).">PLL_OPT_VCO_RANGE_LOW</a> option. </p>

</div>
</div>
<hr/><h2>Enumeration Type Documentation</h2>
<a class="anchor" id="gacfb06d8fc0ffbe934077438884ae697f"></a><!-- doxytag: member="uc3c/pll.h::pll_source" ref="gacfb06d8fc0ffbe934077438884ae697f" args="" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__pll__group.html#gacfb06d8fc0ffbe934077438884ae697f">pll_source</a></td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>PLL clock source. </p>
<dl><dt><b>Enumerator: </b></dt><dd><table border="0" cellspacing="2" cellpadding="0">
<tr><td valign="top"><em><a class="anchor" id="ggacfb06d8fc0ffbe934077438884ae697fa060f32d7388cf128f527739090aa4217"></a><!-- doxytag: member="PLL_SRC_OSC0" ref="ggacfb06d8fc0ffbe934077438884ae697fa060f32d7388cf128f527739090aa4217" args="" -->PLL_SRC_OSC0</em>&nbsp;</td><td>
<p>Oscillator 0. </p>
</td></tr>
<tr><td valign="top"><em><a class="anchor" id="ggacfb06d8fc0ffbe934077438884ae697fa28e003235f43b85c6ee49bbe81b67218"></a><!-- doxytag: member="PLL_SRC_OSC1" ref="ggacfb06d8fc0ffbe934077438884ae697fa28e003235f43b85c6ee49bbe81b67218" args="" -->PLL_SRC_OSC1</em>&nbsp;</td><td>
<p>Oscillator 1. </p>
</td></tr>
<tr><td valign="top"><em><a class="anchor" id="ggacfb06d8fc0ffbe934077438884ae697fa87507b481d2c92b721d802a5ae6cc8a5"></a><!-- doxytag: member="PLL_SRC_RC8M" ref="ggacfb06d8fc0ffbe934077438884ae697fa87507b481d2c92b721d802a5ae6cc8a5" args="" -->PLL_SRC_RC8M</em>&nbsp;</td><td>
<p>8MHz/1MHz RC oscillator </p>
</td></tr>
<tr><td valign="top"><em><a class="anchor" id="ggacfb06d8fc0ffbe934077438884ae697fa5020b47784b860efae2c423d33999dcc"></a><!-- doxytag: member="PLL_NR_SOURCES" ref="ggacfb06d8fc0ffbe934077438884ae697fa5020b47784b860efae2c423d33999dcc" args="" -->PLL_NR_SOURCES</em>&nbsp;</td><td>
<p>Number of PLL sources. </p>
</td></tr>
</table>
</dd>
</dl>

</div>
</div>
<hr/><h2>Function Documentation</h2>
<a class="anchor" id="gaeee0be729bfa596c973cf6f725a89d45"></a><!-- doxytag: member="uc3c/pll.h::pll_config_write" ref="gaeee0be729bfa596c973cf6f725a89d45" args="(const struct pll_config *cfg, unsigned int pll_id)" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void pll_config_write </td>
          <td>(</td>
          <td class="paramtype">const struct <a class="el" href="structpll__config.html">pll_config</a> *&#160;</td>
          <td class="paramname"><em>cfg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>pll_id</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Activate the configuration <em>cfg</em> on <em>pll_id</em>. </p>
<dl><dt><b>Parameters:</b></dt><dd>
  <table class="params">
    <tr><td class="paramname">cfg</td><td>The configuration object representing the PLL configuration to be activated. </td></tr>
    <tr><td class="paramname">pll_id</td><td>The ID of the PLL to be updated. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a class="anchor" id="ga9b369b5f673b10a6adf14cd3c9fea5ad"></a><!-- doxytag: member="uc3c/pll.h::pll_disable" ref="ga9b369b5f673b10a6adf14cd3c9fea5ad" args="(unsigned int pll_id)" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void pll_disable </td>
          <td>(</td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>pll_id</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Disable the PLL identified by <em>pll_id</em>. </p>
<p>After this function is called, the PLL identified by <em>pll_id</em> will be disabled. The PLL configuration stored in hardware may be affected by this, so if the caller needs to restore the same configuration later, it should either do a pll_config_read() before disabling the PLL, or remember the last configuration written to the PLL.</p>
<dl><dt><b>Parameters:</b></dt><dd>
  <table class="params">
    <tr><td class="paramname">pll_id</td><td>The ID of the PLL to be disabled. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a class="anchor" id="gaede6e280289cb0759af0f5a34f5a627f"></a><!-- doxytag: member="uc3c/pll.h::pll_enable" ref="gaede6e280289cb0759af0f5a34f5a627f" args="(const struct pll_config *cfg, unsigned int pll_id)" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">void pll_enable </td>
          <td>(</td>
          <td class="paramtype">const struct <a class="el" href="structpll__config.html">pll_config</a> *&#160;</td>
          <td class="paramname"><em>cfg</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>pll_id</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Activate the configuration <em>cfg</em> and enable PLL <em>pll_id</em>. </p>
<dl><dt><b>Parameters:</b></dt><dd>
  <table class="params">
    <tr><td class="paramname">cfg</td><td>The PLL configuration to be activated. </td></tr>
    <tr><td class="paramname">pll_id</td><td>The ID of the PLL to be enabled. </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
</div>
<!-- window showing the filter options -->
<div id="MSearchSelectWindow"
     onmouseover="return searchBox.OnSearchSelectShow()"
     onmouseout="return searchBox.OnSearchSelectHide()"
     onkeydown="return searchBox.OnSearchSelectKey(event)">
<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Typedefs</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Defines</a></div>

<!-- iframe showing the search results (closed by default) -->
<div id="MSearchResultsWindow">
<iframe src="javascript:void(0)" frameborder="0" 
        name="MSearchResults" id="MSearchResults">
</iframe>
</div>



<hr class="footer"/><address class="footer"><small>
Generated on Mon Dec 19 2011 21:04:54 for OpenShoe by &#160;<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/>
</a> 1.7.5.1
</small></address>

</body>
</html>
